DSP Speech Processor Experimentation

Version 3.0


A version three of the processor is being designed. Instead of being DIY, this version might be made mostly pre-built.
Design work is in the early stages, but differences will include:

Multiple 16-bit audio CODEC IC(s) including S/PDIF I/O.


Crystal locked CPU clock.


A faster SMD DSP - Perhaps a 100MHz dsPIC processor.

A larger box, with a more complex display and more options for user input.


The latest idea for v3.0 is to make a generic DSP box with adequate audio I/O for various applications.
This would allow the unit to be programmed for different types of functions, such as:

Staying with a dsPIC processor will speed up development, by making use of existing code.
 
 
 

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